Plasma display panel with a low k dielectric layer

ABSTRACT

A plasma display panel including a low k dielectric layer. In one embodiment, the dielectric layer is comprises a fluorine-doped silicon oxide layer such as an SiOF layer. In another embodiment, the dielectric layer comprises a Black Diamond™ layer. In certain embodiments, a capping layer such as SiN or SiON is deposited over the dielectric layer.

FIELD OF THE INVENTION

The present invention relates generally to plasma display panels andmore particularly to plasma display panels employing a low k dielectriclayer.

BACKGROUND OF THE INVENTION

As is well known, a plasma display panel (“PDP”) is a very thin displayscreen used in large screen displays, for example high definitiontelevision displays (HDTV) and the like. PDPs include a pair ofdielectric plates, each having a pattern of parallel electrodes thereon.The displays operate by generating a plasma or gas discharge betweencrossed electrodes inside a partially evacuated environment.

However, one of the limitations of this technology is their high powerusage. For example, commercially available PDPs use about 300-700 Wattsfor the display. Further, the displays require that they be manufacturedwith a fan integral with the display to help dissipate the large amountof heat generated by their use. One parameter which determines theamount of power used by the PDP and the amount of heat producedtherefrom is a dielectric layer that is deposited over the electrodes ofthe front glass plate. Typically, a lead (Pb) doped glass having athickness of about 30 microns is used for this dielectric layer. Thedielectric constant of this glass layer is generally in the range ofabout 12 to 16. It is understood that the power consumption and heatgeneration for the PDPs is a direct function of the dielectric constantof this dielectric layer.

In addition to the onerous power requirements imposed by lead-dopedglass, lead is a well-known toxic material and therefor the use of theselayers imposes risks upon the workers employed not only in producing thelayers, but in assembly of the products down line. Still further, verycritical and precise annealing procedures are required in order to getgood results from a lead dielectric layer. For example, not only areannealing temperatures of 400-600° C. are said to be required, but acareful, slow and controlled ramping of the temperature of the substratefrom room temperature to the anneal temperature is required. The annealtreatment is carried out at the elevated temperature and then a careful,slow and controlled ramp down of the temperature is required to returnthe substrate to room temperature. Practically speaking, this canrequire furnaces up to one hundred meters long to carry out the properannealing of a PDP having a lead dielectric layer.

These PDPs are oftentimes yet further limited by stringent disposalrequirements, promulgated because of some of their toxic andenvironmentally harmful components (e.g., Pb doped films and the like).For example, Japan requires manufacturers to retain cradle-to-graveresponsibility for these products.

FIG. 1 illustrates a typical PDP as is commonly known in the art. ThePDP is comprised of two glass plates: a front plate 2 and a back plate 4which are opposite each other. A plurality of transparent parallelelectrodes E1 are formed on plate 1 across a plurality of electrodes E2formed on plate 2, such that the pattern of electrodes on one plate arearranged orthogonally to the pattern of electrodes on the oppositeplate. Electrodes E1 may also have a low resistive material, e.g., buselectrodes E3, operably associated with them to lower the electricresistance. A dielectric layer 10 and an MgO layer 12 are formed on thefront plate electrodes E1. Commonly, lead-doped glass is used as thedielectric layer. A dielectric layer 11 may optionally be formed on theback plate electrodes E2. A means for fluorescence 8 a, 8 b and 8 c suchas phosphors are formed on the back plate electrodes E2. The PDP isconstructed in such a manner that the front plate 2 and the back plate 4are assembled and sealed by a sidewall (not shown) so that a gap isformed between the plates whereby such gap defines a discharge region 6.For maintaining the gap, barrier ribs 7 are formed in the gap betweenthe front panel 2 and the back panel 4, to provide structural support.In this way, a pixel of a unit cell is formed at each intersectionbetween each electrode E1 and each electrode E2. The PDP is capable ofdisplaying an image by a plurality of the pixels driven by a drivingcircuit.

As described, typically lead (Pb) doped glass is used for thisdielectric layer and has a dielectric constant of about 16. It isunderstood that power consumption and heat generation for PDPs aredirect functions of the dielectric constant of this dielectric layer.Accordingly, if a dielectric layer could be used which has a lowerdielectric constant, yet is the same as or better than previousdielectric layers in respect to other relevant attributes, the powerconsumption and heat generation could be decreased. It would be furtherbeneficial if such a dielectric layer could be manufactured withouttoxic and environmentally unfriendly materials such as lead. Thus, thereis a need for a PDP with a dielectric layer which has a low dielectricconstant, high transmittance, high electrical breakdown voltage and goodstability, which would decrease the power consumption and heatgeneration of the display while maintaining the required luminositycharacteristics.

The present invention endeavors to address and solve these and otherproblems associated with PDPs.

SUMMARY OF THE INVENTION

Plasma display panels are disclosed which include a first plate having afirst set of parallel electrodes deposited thereon, a second platehaving a second set of parallel electrodes deposited thereon, and atleast one of the sets of electrodes being covered by a low k dielectriclayer.

The second set of parallel electrodes are oriented at right angles tothe first set of parallel electrodes. The first and second plates areoriented parallel to one another to form a space therebetween filledwith a discharge gas.

The low k dielectric material used to deposit the low k dielectric layermay be a halogen doped silicon oxide layer, such as a fluorine dopedsilicon oxide layer, e.g. SiOF. The layer typically has a thickness ofabout 10 to 15 microns.

A dielectric layer may also be formed from trimethylsilanes and/ormethysilanes. For example, a dielectric layer comprising Black Diamond™may be formed. Such a layer typically has a thickness of about 10 to 15microns.

Optionally, a capping layer may be deposited over the low k dielectriclayer. The capping layer may be formed from a silicon source andnitrogen source, and may comprise SiN or SiON, for example. A cappinglayer according to the present invention typically has a thickness ofabout 10 to 100 nanometers.

A method of making a plasma display panel is disclosed to includeflowing a process gas in a processing chamber over a glass substratehaving parallel electrodes; applying RF energy to the chamber to createa plasma; and depositing a low k dielectric layer on said glasssubstrate, wherein said dielectric layer has a low k value.

The process gas may comprise a fluorine source, a silicon source, anoxygen source and/or a nitrogen source. Optionally, a carrier gas mayalso be flowed with the process gas.

Further optionally, a method of depositing a capping layer over thedielectric layer is disclosed to include flowing a capping layer processgas; applying RF energy to the chamber to create a plasma; anddepositing a capping layer over said dielectric layer.

The capping layer process gas may comprise a silicon source and anitrogen source. The capping process gas may further comprise an oxygensource.

These and other objects, advantages, and features of the invention willbecome apparent to those persons skilled in the art upon reading thedetails of the PDPs and methods as more fully described below.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view of a PDP known in the art.

FIG. 2 is a cross sectional view of a PDP according to the presentinvention.

DETAILED DESCRIPTION OF THE INVENTION

Before the present embodiments are described, it is to be understoodthat this invention is not limited to particular materials, substrates,etc. described, as such may, of course, vary. It is also to beunderstood that the terminology used herein is for the purpose ofdescribing particular embodiments only, and is not intended to belimiting, since the scope of the present invention will be limited onlyby the appended claims.

Where a range of values is provided, it is understood that eachintervening value, to the tenth of the unit of the lower limit unlessthe context clearly dictates otherwise, between the upper and lowerlimits of that range is also specifically disclosed. Each smaller rangebetween any stated value and intervening value in a stated range and anyother stated or intervening value in that stated range is encompassedwithin the invention. The upper and lower limits of these smaller rangesmay independently be included or excluded in the range, and each rangewhere either, neither or both limits are included in the smaller rangesis also encompassed within the invention, subject to any specificallyexcluded limit in the stated range. Where the stated range includes oneor both of the limits, ranges excluding either or both of those includedlimits are also included in the invention.

Unless defined otherwise, all technical and scientific terms used hereinhave the same meaning as commonly understood by one of ordinary skill inthe art to which this invention belongs. Although any methods andmaterials similar or equivalent to those described herein can be used inthe practice or testing of the present invention, the preferred methodsand materials are now described. All publications mentioned herein areincorporated herein by reference to disclose and describe the methodsand/or materials in connection with which the publications are cited.

It must be noted that as used herein and in the appended claims, thesingular forms “a”, “and”, and “the” include plural referents unless thecontext clearly dictates otherwise. Thus, for example, reference to “asubstrate” includes a plurality of such substrates and reference to “themetal” includes reference to one or more metals and equivalents thereofknown to those skilled in the art, and so forth.

The publications discussed herein are provided solely for theirdisclosure prior to the filing date of the present application. Nothingherein is to be construed as an admission that the present invention isnot entitled to antedate such publication by virtue of prior invention.Further, the dates of publication provided may be different from theactual publication dates which may need to be independently confirmed.

Definitions

“Dielectric” as used herein refers to a material in which an electricfield can be maintained with zero or near zero power dissipation, i.e.,the electrical conductivity is zero or near zero.

“Low k” and “Low k Material” as used herein refers to dielectricmaterial having a dielectric constant (i.e., “k”) value significantlyless than 16. The exemplary embodiments have k values less than about4.5.

Plasma Display Panel

The present invention is directed towards a plasma display panel (“PDP”)comprising a low k dielectric layer. In certain embodiments, a cappinglayer is deposited over the dielectric layer. In further describing theinvention, the subject PDP, exemplary embodiments of the PDP and methodsto produce the PDP are described.

Exemplary Embodiments of the Subject Invention

An embodiment of a PDP according to the present invention will bedescribed hereinbelow with reference to FIG. 2.

FIG. 2 is a cross-sectional illustration of a PDP according to thepresent invention. The PDP includes a front side transparent substrate30 of glass as a display surface and a back side glass substrate 32disposed in parallel to the front side substrate whereby the frontsubstrate 30 and the back substrate 32 are assembled and sealed togetherby a sidewall (not shown) to form a gap 36 therebetween. Barrier ribs 37are formed in the gap 36 between the substrates 30 and 32 tostructurally support the substrates and maintain the gap. The front sidesubstrate 30, the back side substrate 32 and a pair of barrier ribsdefine and surround a space as a discharge region 38.

The front side substrate 30 has a plurality of pairs of transparentelectrodes 40 and 40 as column electrodes on its surface facing the backside substrate 32 in such a manner that the column electrodes extendparallel to each other. The pairs of column electrodes serve as controlelectrodes for driving the pixels and are formed of a transparentconductive material, such as indium tin oxide. Electrodes 40 and 40 mayalso have a low resistive material, e.g., bus electrodes 42, operablyassociated with them to lower the electric resistance. Bus electrodes 42and 42 are formed on and along the far opposite edges of the transparentelectrodes 40 and 40, respectively to the edges thereof. The buselectrodes 42 and 42 are made of copper, for example, and each has awidth narrower than that of the column electrode 40. A dielectric layer44 is formed on the pairs of column electrodes 40 and 40 and the buselectrodes 42 and 42 as covering them at a thickness of about 10 to 15microns. A capping layer 46 may be formed on the dielectric layer 44 ata thickness of about 10 to 100 nanometers. A layer 48 comprised ofmagnesium oxide (MgO), for example, is formed on the capping layer 46 ata thickness of about 0.5 microns.

The dielectric layer 44 is a low k dielectric layer. In exemplaryembodiments, the dielectric layer is comprised of a halogen-dopedsilicon oxide layer having a dielectric constant of 4.5 or less, e.g., afluorine-doped silicon oxide layer (SiOF) having a dielectric constantof about 3.0 to 4.5. Consequently, such a PDP will require only about100 to 250 Watts of power during use, compared to a prior art PDP of thesame size which would require about 300 to 700 Watts to operate.

Accordingly, a silicon oxide film is deposited over the columnelectrodes by first introducing a process gas into a processing chamberand then applying an RF power component to the process gas to form aplasma. The SiOF layer may be deposited in any suitable PECVD chambersuch as those manufactured by AKT, Inc. and/or Applied Materials, e.g.,AKT 5500, 1600, 3500 and 4300 PECVD Systems. It will be appreciated thatother suitable processing chambers can be used with the presentinvention as well.

SiOF is deposited using a process gas comprising fluorine, oxygen,nitrogen and silicon precursors. As such, fluorine sources suitable foruse in the present invention include CF₄, C₂F₆ and NF₃ and the like. Inone particular method of depositing the layer, the process gas includessilicon tetrafluoride (SiF₄) as the fluorine source and forms a plasmatherefrom. It is believed that SiF₄ is a particularly effective fluorinesource for SiOF layers because the four fluorine atoms bonded to asilicon atom in a molecule of the gas supply a higher percentage offluorine into the deposition chamber for a given flow rate as comparedwith other fluorine sources. Additionally, SiF₄ has more fluorine bondedto silicon available for the plasma reaction than other fluorinesources. However, it will be appreciated that any other appropriatefluorine source could be employed in the present invention as well.

As described above, the process gas also includes a gaseous source ofsilicon. In one exemplary embodiment, silicon is provided by silane(SiH₄). Further, an oxygen precursor is also included in the processgas, for example a gaseous source of oxygen such as O₂, N₂O, CO₂, or amixture of two or more of the same. An inert gas such as a gaseoussource of helium (He), argon (Ar) or the like may optionally be flowedalong with the precursor gases.

To form the halogen-doped silicon oxide dielectric layer, e.g., afluorine-doped silicon oxide layer, of the present invention, the PDPsubstrate, i.e., a glass substrate comprised of at least one electrodeis loaded into a processing chamber through a vacuum interlock andplaced onto a pedestal in the chamber.

Once the substrate is properly positioned, the substrate is heated bythe plasma and initially by the pedestal (e.g., by one or more heatingelements such as resistive coils or by other methods) to a temperatureof about 300° C. to 450° C. and a process gas is introduced into theprocessing chamber from a gas distribution manifold. In one example, theprocess gas is a mixture comprising SiF₄ as the gaseous source offluorine and silicon; and O₂, N₂O or CO₂ as the gaseous source ofoxygen. As one alternative, SiH₄ may be used as the gaseous source ofsilicon, CF₄ may be used as a gaseous source of fluorine, and O₂, N₂O orCO₂ (or mixtures thereof) may be used as the gaseous source of oxygen.

In an example where SiF₄ is used, SiF₄ will be introduced into theprocessing chamber at a flow rate of about 500 to 2000 sccm, and O₂,N₂O, CO₂ or a mixture of two or more of these will be introduced at aflow rate of about 5000 to 30,000 sccm. These gas flow rates are givenfor a chamber having a volume of about 48 liters adapted to accommodatean A4 PDP substrate with dimensions of about 21 cm×30 cm. Those skilledin the art will recognize that the gas flow rates, as well as otherprocessing parameters, will vary with variations in chamber andsubstrate size and can be adjusted accordingly. Generally, the gas flowrates are set such that a ratio of the sum of the flow rates of thegaseous sources of oxygen divided by the flow rates of SiF₄ is about 5to 20. Specific flow rates will depend upon the substrate size (thesurface of which the film is to be deposited on) and the desireddeposition rate.

The chamber will be maintained at a pressure of about 1-15 Torr and theprocess gas will be excited into a plasma state through the use of an RFpower source at a power density of about 0.75 to 3.0 W/cm². Thedeposition rate of the process is estimated to be about 1 μ/minute.Typically, the gases will flow for about 10 minutes, but the time, ofcourse, is dependent upon the desired final thickness of the film beingdeposited. After deposition of the layer, the RF power is turned off,the gas flow into the chamber is stopped and the gases in the chamberare pumped out of the chamber. The result is a stable SiOF layer ofuniform thickness having a fluorine content of about 1-30% (atomicpercent) and having a dielectric constant of about 3.0 to 4.5, andusually between about 3.2 and 4.0.

In another example, SiH₄ is introduced into the processing chamber at aflow rate of about 500 to 2000 sccm, CF₄ is typically introduced at aflow rate of about 1000 to 3000 sccm, and N₂O or CO₂ is introduced at aflow rate of about 5000 to 30,000 sccm. These gas flow rates are givenfor a chamber having a volume of about 48 liters adapted to accommodatean A4 PDP substrate with dimensions of about 21 cm×30 cm. Those skilledin the art will recognize that the gas flow rates, as well as otherprocessing parameters, will vary with variations in chamber andsubstrate size and can be adjusted accordingly. Generally, the gas flowrates are set such that a ratio of the sum of the flow rates of thegaseous sources of oxygen divided by the sum of the flow rates of SiH₄and CF₄ is about 5 to 20. Specific flow rates will depend upon thesubstrate size (the surface of which the film is to be deposited on) andthe desired deposition rate.

The chamber is maintained at a pressure of about 1-15 Torr and theprocess gas is excited into a plasma state through the use of an RFpower source at a power density of about 0.75 to 3.0 W/cm². Thedeposition rate of the process is at about 1 μ/minute. Typically, thegases flow for about 10 minutes, but, as noted above, time durationswill vary according to the thickness requirements of the depositionlayer. After deposition of the layer, the RF power is turned off, thegas flow into the chamber is stopped and the gases in the chamber arepumped out of the chamber. The result is a stable SiOF layer of uniformthickness having a fluorine content of about 1-30% (atomic percent) andhaving a dielectric constant of about 3.0 to 4.5, and usually betweenabout 3.2 and 4.0.

One problem encountered in the deposition of SiOF layers is thestability of the layer. Loosely bound fluorine atoms in the latticestructure of some SiOF layers results in films having a tendency toabsorb moisture. The absorbed moisture increases the film's dielectricconstant and can cause other problems as well, for example if thesubstrate is exposed to a thermal process such as an anneal process. Thehigh temperatures of thermal processes can move the absorbed watermolecules and loosely bound fluorine atoms out of the layer throughother subsequently deposited layers. The excursion of molecules andatoms in this manner is referred to as outgassing. To reduce orsubstantially eliminate moisture absorption and outgassing, a cappinglayer 46 may be deposited over the dielectric layer 44.

Typically, the capping layer will be deposited in situ with thedielectric layer. Two capping layers particularly suitable for cappingdielectric layers, e.g., halogen doped silicon oxide layers such asSiOF, are SiON and SiN layers; however, it will be appreciated thatother appropriate capping layers can be used with the present inventionas well.

In one exemplary embodiment, SiON is the capping layer. Accordingly, acapping layer process gas comprised of a gaseous source of silicon(SiH₄), and a gaseous source of oxygen (O₂, N₂O or CO₂) is firstintroduced into a chamber and then an RF power component is applied tothe processing gas to form a plasma.

For example, the substrate is heated by the pedestal (pedestaltemperature is about 300-450° C.). SiH₄ is flowed into the chamber atabout 400-700 sccm, N₂ is flowed into the chamber at about 15,000-20,000sccm and N₂O is flowed into the chamber at about 1500 to 3000 sccm. Itis noted that a carrier gas such as an inert gas, e.g., helium (He),argon (Ar), or the like can be flowed into the processing chamber aswell. Those skilled in the art will recognize that the gases can beflowed sequentially or simultaneously. The chamber pressure ismaintained at about 1.0 to 5.0 Torr and the process gas is excited intoa plasma state through the use of an RF power source at a power densityof about 1.0 to 3.0 W/cm². Deposition occurs at a rate of about 0.25μ/minute. After deposition of the layer, the RF power is turned off, thegas flow into the chamber is stopped and the gases in the chamber arepumped out of the chamber. It will be appreciated that the processingparameters can be modified or changed in response to variations inchamber and/or substrate size variations.

The result is a capping layer, i.e., an SiON capping layer, with athickness of about 10 to 100 nanometers suitable to minimize orsubstantially eliminate moisture absorption and outgassing of theunderlying layer.

In another embodiment, the capping layer is an SiN layer deposited overthe dielectric layer. As such, a capping layer process gas comprised ofa gaseous source of silicon (SiH₄) and a gaseous source of nitrogen (N₂,NH₃) is first introduced into a chamber and an RF power component isapplied to the processing gas to form a plasma.

For such an SiN capping layer, the substrate is heated by the pedestal(pedestal temperature is about 300-450° C.), SiH₄ is flowed into thechamber at about 400 to 700 sccm, N₂ is flowed into the chamber at about15,000 to 20,000 sccm and NH₃ is flowed into the chamber at about 2,500to 5,000 sccm. It is noted that a carrier gas such as an inert gas,e.g., helium (He), argon (Ar), or the like and can be flowed into theprocessing chamber as well. Those skilled in the art recognize that thegases can be flowed sequentially or simultaneously, and that flow rateswill vary depending upon the substrate size and the desired depositionrate. Generally, the gas flow rates are set such that a flow ratiodefined by the sum of the flow rates of the gaseous sources of nitrogendivided by the flow rate of SiH₄ is about 25 to 60. Specific flow rateswill depend upon the substrate size (the surface of which the layer isto be deposited on) and the desired deposition rate.

The chamber pressure is maintained at about 1.0 to 5.0 Torr and theprocess gas is excited into a plasma state through the use of an RFpower source at a power density of about 1.0 to 3.0 W/cm². Depositionoccurs at a rate of about 0.25 μ/minute for a flow ratio of about 36 anda substrate size of about 21 cm×30 cm. The deposition rate of SiON isdetermined by the SiH₄ flow rate. After deposition of the layer, the RFpower is turned off, the gas flow into the chamber is stopped and thegases in the chamber are pumped out of the chamber. It will beappreciated that the processing parameters can be modified or changed inresponse to chamber and/or substrate size.

The result is a capping layer, i.e., a SiN layer, with a thickness ofabout 10 to 100 nanometers sutitable to minimize or substantiallyeliminate moisture absorption and outgassing of the underlying layer.

In other preferred embodiments of the present invention, the dielectriclayer is comprised of either methylsilane (MS) or trimethylsilane (TMS)and an oxygen source, e.g., a Black Diamond™ layer is particularlysuitable for use in the present invention, (i.e., a compositioncomprising TMS/O₂, TMS/O₃, TMS/NO₂, or MS/N₂O (supplied by Airproduct,Allentown, Pa.)), which has a dielectric constant of less than about3.5, and usually between about 2.6 and 3.4.

In one example, a Black Diamond™ layer is deposited over the electrodesby first introducing a process gas into a chamber and then applying anRF power component to the process gas to form a plasma. The BlackDiamond™ layer may be deposited in any suitable PECVD chamber such asthose manufactured by AKT, Inc. and/or Applied Materials, e.g., an AKT5500, 1600, 3500 and 4300. It will be appreciated that other suitableprocessing chambers can be used as well.

Either TMS or MS or a combination of these precursors may be flowed withan oxygen precursor to form a plasma. In many embodiments, an inert gassuch as a gaseous source of helium (He), argon (Ar) or the like is alsoflowed along with the precursor gases. Accordingly, to form the BlackDiamond™ dielectric layer of the present invention, the PDP substrate,i.e., a glass substrate with at least one electrode, is loaded into aprocessing chamber through a vacuum interlock and placed onto a pedestalin the chamber. Once the substrate is properly positioned, thetemperature of the substrate and chamber are controlled so as tomaintain a processing temperature of about 0° C. to about 250° C., forexample. The process gas is then introduced into the processing chamberfrom a gas distribution manifold. The process gas is a mixturecomprising TMS or MS or a combination thereof and a gaseous source ofoxygen (such as O₂, O₃, N₂O or some combination thereof); preferably theprocess gas is TMS and O₂, TMS and O₃, TMS and N₂O or MS and N₂O.

TMS or MS or a combination of TMS and MS is introduced into theprocessing chamber at a flow rate of about 30-150 sccm and either O₂,O₃, N₂O or some combination thereof is introduced at a flow rate ofabout 300-1500 sccm. Those skilled in the art recognize that the gasescan be flowed sequentially or simultaneously and that the flow ratesscale with the size of the chamber being used and the surface area ofthe substrate upon which the film is to be deposited. In addition,helium (He) may be may be introduced as a carrier gas. If used, He willbe introduced into the processing chamber at a rate of about 1500-8000sccm. Generally, the gas flow rates are set such that a ratio of the sumof the flow rates of the gaseous sources of oxygen divided by the sum ofthe flow rates of TMS and MS will be about 2 to 50, usually about 5 to40. If used, the ratio of He flow to the sum of the flow rates of TMSand MS will be about 10 to 260, usually about 30 to 75.

The chamber is maintained at a pressure of about 1-15 Torr and theprocess gas is excited into a plasma state through the use of an RFpower source which generates a power density of about 0.10 to 0.25W/cm². The deposition rate of the process will be at least about 350nanometers per minute, for a flow ratio, defined by the flow rate ofgaseous sources of oxygen divided by the sum of the flow rates of TMSand MS of about 10. The duration of the flow of gases will be determinedby the desired thickness of the layer to be deposited. After depositionof the layer, the RF power is turned off, the gas flow into the chamberis stopped and the gases in the chamber are pumped out of the chamber.The result of this process is a stable Black Diamond™ layer having athickness of about 10 to 15 microns having a dielectric constant of lessthan about 3.5, and usually between about 2.6 to 3.4. It is understoodthat the processing gases can be flowed concurrently or serially. It isnoted that a capping layer may be omitted for a Black Diamond™dielectric layer.

In one example, using an AKT 1600 PECVD chamber to deposit a BlackDiamond™ dielectric layer on a substrate having a length of about 47 cmand a width of about 37 cm, the chamber will be maintained at atemperature of about 25° C. after loading the substrate. Methylsilanewill then be flowed into the chamber at about 117 sccm and N₂O will beflowed in at about 1,235 sccm. Additionally, helium will be flowed in atabout 6,800 sccm. The pressure in the chamber will be controlled toabout 3 Torr during processing, and an RF power of about 275 W will beused to generate the plasma for forming the Black Diamond™ depositionlayer. The deposition rate will be about 350 nanometers/minute andprocessing will proceed for about 25 to 45 minutes to form a depositionlayer of about 10 to 15 microns in thickness.

Referring again to FIG. 2, the back side substrate 32 has a plurality ofaddressing electrodes 50 as row electrodes on its surface facing thefront side substrate 30 in such a manner that the row electrodes extendin parallel to each other. The row electrodes 50 also serve assustaining electrodes for driving the pixels and are formed of a highreflectance material, for example a metal such as Cu, Al, an Al alloy orany other appropriate metal or alloy thereof having a high reflectancesuch as copper alloys, Au or an alloy thereof, although copper is usedmost often. A dielectric layer 51 may optionally be formed on theaddressing electrodes 50.

The barrier ribs (not shown) are formed between the row electrodes 50 onthe back side substrate 32 to define and surround spaces such asdischarge regions. The row electrodes 50 and the exposed surface of theback side substrate 32 are covered with a fluorescent layer 52 for amonochrome PDP. In the case of a color PDP, three fluorescent layersmade of fluorescent substances for emitting red 52 a, blue 52 b andgreen 52 c lights are formed in turn on the corresponding row electrodes50 respectively, so that each pixel emits light correspondingly to thefluorescent substance.

The back side substrate 32 and the front side substrate 30 are assembledin such a manner that the row electrodes 50 are perpendicular to thecolumn electrodes 40. After assembly, the intersections with a gapbetween the column electrodes 40 and the row electrodes 50 definedischarge regions 38 for emitting regions of pixels. The front sidesubstrate and the back side substrate are fixed to each other and thegap of discharge regions 38 is exhausted by a vacuum pump. Subsequently,the assembly is baked so that the surface of the MgO layer 48 isactivated. Next, an inert gas mixture including a rare gas of xenon (Xe)(e.g., Xe, He and Kr) is introduced and sealed into the dischargeregions.

While the present invention has been described with reference to thespecific embodiments thereof, it should be understood by those skilledin the art that various changes may be made and equivalents may besubstituted without departing from the true spirit and scope of theinvention. In addition, many modifications may be made to adapt aparticular situation, material, composition of matter, process step orsteps, to the object, spirit and scope of the present invention. Allsuch modifications are intended to be within the scope of the claimsappended hereto.

That which is claimed is:
 1. A method of making a plasma display panel,said method comprising the steps of: flowing a process gas in aprocessing chamber over a plasma display panel substrate; creating aplasma of said process gas; and depositing a low k dielectric layer onsaid plasma display panel substrate, wherein said dielectric layer has alow k value, wherein said flowing a process gas comprises: (i) flowingat least one halogen source, at least one silicon source, and at leastone oxygen source or (ii) flowing at least one silicon source selectedfrom the group consisting of a trimethylsilane and a methylsilane; andflowing at least one oxygen source.
 2. The method of claim 1, whereinsaid flowing a process gas comprises flowing said at least one halogensource, said at least one silicon source, and said at least one oxygensource and wherein said at least one halogen source is selected from thegroup consisting of SiF₄, CF₄, C₂F₆ and NF₃.
 3. The method of claim 1wherein said flowing a process gas comprises flowing said at least onehalogen source, said at least one silicon source, and said at least oneoxygen source and wherein a ratio of said at least one oxygen source toa sum of the flow rate of said at least one halogen source and the flowrate of said at least one silicon source is about 5 to
 20. 4. The methodof claim 1, wherein said flowing a process gas comprises flowing said atleast one halogen source, said at least one silicon source, and said atleast one oxygen source and wherein said at least one oxygen source isselected from the group consisting of O₂, N₂O and CO₂.
 5. The method ofclaim 1, wherein said flowing a process gas comprises flowing said atleast one halogen source, said at least one silicon source, and said atleast one oxygen source and wherein a flow rate of said at least oneoxygen source is about 7.5 slm to about 200 slm.
 6. The method of claim1, wherein said flowing a process gas comprises flowing at least onehalogen source, at least one silicon source, and at least one oxygensource and wherein said at least one silicon source and said at leastone halogen source is SiF₄.
 7. The method of claim 6, wherein a ratio ofa flow rate of said at least one oxygen source to a flow rate of said atleast one silicon source is about 5 to
 20. 8. The method of claim 1wherein said flowing a process gas comprises flowing said at least onehalogen source, said at least one silicon source, and said at least oneoxygen source and wherein said process gas is flowed for about 3 to 10minutes while the pressure in said processing chamber is about 1 Torr toabout 15 Torr and the temperature of said plasma display panel substrateis about 300° C. to about 450° C.
 9. The method of claim 1, wherein saidflowing a process gas comprises flowing said at least one halogensource, said at least one silicon source, and said at least one oxygensource and wherein said creating comprises applying an RF energy to thechamber at a power density of about 0.75 W/cm² to 3.0 W/cm².
 10. Themethod of claim 1, wherein said flowing a process gas comprises owing atleast one silicon source selected from the group consisting of atrimethylsilane and a methylsilane; and flowing at least one oxygensource and wherein a ratio of a flow rate of said at least one oxygensource to a flow rate of said at least one silicon source is about 2 to50.
 11. The method of claim 1, wherein said flowing a process gascomprises flowing at least one silicon source selected from the groupconsisting of a trimethylsilane and a methylsilane; and flowing at leastone oxygen source and wherein said at least one oxygen source isselected from the group consisting of O₂, CO₂, O₃ and N₂O.
 12. Themethod of claim 1, wherein said flowing a process gas comprises flowingat least one silicon source selected from the group consisting of atrimethylsilane and a methylsilane; and flowing at least one oxygensource and wherein said process gas further comprises a carrier gas. 13.The method of claim 1, said flowing a process gas comprises flowing saidat least one halogen source, said at least one silicon source, and saidat least one oxygen source, the method further comprising the steps offlowing a capping layer process gas; creating a second plasma; anddepositing a capping layer over said dielectric layer.
 14. The method ofclaim 13, wherein said capping layer process gas comprises at least onesilicon source and at least one nitrogen source.
 15. The method of claim14, wherein said at least one silicon source comprises SiH₄.
 16. Themethod of claim 14, a ratio of a flow rate of said at least one nitrogensource to a flow rate of said at least one silicon source is about 25 to60.
 17. The method of claim 14, wherein said at least one nitrogensource is selected from the group consisting of N₂ and NH₃.
 18. Themethod of claim 14, wherein said capping process gas further comprisesat least one oxygen source.
 19. The method of claim 18, wherein said atleast one oxygen source is selected from the group consisting of O₂, N₂Oand CO₂.
 20. The method of claim 18, wherein creating a second plasmacomprises applying an RF energy to said chamber at a power density ofabout 1.0 W/cm² to 3.0 W/cm².
 21. The method of claim 13, wherein saidcapping layer process gas is flowed for about 0.2 to 2 minutes while thepressure in said processing chamber is about 1.0 to 3.0 Torr and thetemperature of said plasma display panel substrate is about 300° C. to450° C.
 22. The method of claim 13, wherein said creating a secondplasma comprises applying an RF energy to the chamber at a power densityof about 1.0 W/cm² to 3.0 W/cm².
 23. The method of claim 13, whereinsaid capping layer process gas is flowed for about 0.2 to 2.0 minuteswhile the pressure in said processing chamber is about 1.0 to 5.0 Torrand the temperature of said plasma display panel substrate is about 300°C. to 450° C.
 24. The method of claim 1 wherein said chamber is a plasmaenhanced chemical vapor deposition chamber.
 25. The method of claim 1wherein said plasma display panel substrate is a glass that includes atleast one electrode.
 26. The method of claim 1 wherein said glass hasdimensions of about 21 centimeters by 30 centimeters.
 27. The method ofclaim 1 wherein said depositing a low k dielectric layer on said plasmadisplay panel substrate occurs at a deposition rate of about 1 micronper minute.
 28. The method of claim 1 wherein said low k dielectriclayer has a dielectric constant of about 3.0 to 4.5.
 29. The method ofclaim 1 wherein said low k dielectric layer has a dielectric constant ofless than about 3.5.
 30. The method of claim 1 wherein said glass hasdimensions of about 47 centimeters by about 37 centimeters.
 31. A methodof making a plasma display panel, said method comprising the steps offlowing a process gas in a processing chamber over a plasma displaypanel substrate; creating a plasma of said process gas; and depositing alow k dielectric layer on said plasma display panel substrate, whereinsaid dielectric layer is a carbon-doped dielectric comprising hydrogen,carbon, silicon, and oxygen, an atomic percentage of said carbon beingbetween 5 and 25% and an atomic percentage of said silicon being between15 and 25%, and an atomic percentage of said hydrogen being between 35and 60%.
 32. The method of claim 31 wherein said plasma display panelsubstrate is maintained at a processing temperature of about 0° C. toabout 250° C. during said depositing.
 33. The method of claim 31 whereinsaid processing chamber is maintained at a pressure of 1-15 Torr duringsaid depositing.
 34. A The method of claim said creating a plasmacomprises using an RF power source that generates a power density ofbetween 0.10 W/cm² and 0.25 W/cm².
 35. The method of claim 31 whereinsaid dielectric layer has a thickness of between 10 microns and 15microns.
 36. The method of claim 31 said dielectric layer has adielectric constant of less than about 3.5.
 37. The method of claim 31said dielectric layer has a dielectric constant between about 2.6 and3.4.